1. Field of the Invention
The present invention relates to a solid-state imaging apparatus.
2. Description of the Related Art
A solid-state imaging apparatus has been proposed that has a pixel array including pixels arranged in an array, reads out pixel signals obtained by the pixels in the pixel array from each column, and processes the signals from each column with a CDS circuit or the like to convert them into image signals. With this solid-state imaging apparatus, fixed-pattern noise in a vertical-line shape occurs in some cases due to variation of output signals among columns or among output signal paths. Japanese Patent Laid-Open No. 2008-271280 proposes a configuration in which the vertical-line noise is corrected using, as data for vertical-line noise correction, output signals of dummy pixels having characteristics equivalent to effective pixels. With this configuration, the vertical-line noise can be effectively corrected by obtaining a difference between signals that are output simultaneously from an effective pixel and a dummy pixel.
Also, in recent solid-state imaging apparatuses, the size of layouts has been reduced due to the increasing number of pixels and readout lines. For this reason, regarding readout circuits arranged in each column, there is a tendency that the distance within circuits in adjacent columns and the distance between adjacent readout circuits become shorter, along with the reduction in size. As a result, signal interference is more likely to occur among the readout circuits, and this interference causes noise. In particular, with the configuration in which dummy pixels are used to obtain reference data, the distance between an effective pixel and a dummy pixel is significantly shortened, and therefore, crosstalk occurs between the effective pixel and the dummy pixel and affects the characteristics of the data used as the reference data.